Exploring the limit of strain-induced performance gain in p- and n-SSDOI-MOSFETs

We investigate by Monte Carlo simulation the strain-induced performance enhancement in n- and p-type SSDOI-MOSFETs under scaling to L/sub G/=10 nm with constant I/sub off/-obtained via adjusting the Si film thickness t/sub Si/. The improvement in the order of 30% at 50 and 25 nm strongly decreases at 10 nm involving even an absolute decrease of I/sub on/.