A floating-gate track-and-hold circuit with robustness to component mismatches

A track-and-hold (T/H) circuit using the floating-gate (FG) technique is introduced based upon a pair of complementary FGMOS transistors. Its main features include low complexity, low operating supply voltage and gain insensitivity to device mismatches. Emphasis is given on the circuit operation. Functional verification is provided through simulated performances of a single T/H cell.