A new IFFT/FFT hardware implementation structure for OFDM applications

In OFDM applications, IFFT/FFT hardware in the transceiver is usually designed jointly to carry out IFFT and FFT functions for transmission and receiving processes, respectively. We present a new IFFT/FFT hardware implementation structure with less complexity for OFDM applications. The proposed method can be applied to existing various FFT algorithms while implementing the OFDM. The 64-point IFFT/FFT chips for the radix-4/2 and radix-2/4/8 algorithms based on the proposed scheme are implemented by using TSMC 0.35 /spl mu/m, TSMC 0.25 /spl mu/m and UMC 0.18 /spl mu/m CMOS technologies. The implementation results show that our method can achieve a less complexity and area-efficiency IFFT/FFT processor.