A fully integrated 5.2 GHz CMOS inductively degenerated low noise amplifier

This work presents a fully integrated 5.2 GHz inductively degenerated low noise amplifier (LNA) design fully integrated in a TSMC 0.25 /spl mu/m CMOS process. We design a 0.516nH minute inductor as a source inductor by the EM analysis of the ADS. The designed LNA consumes 11.9 mW DC power. At 5.2 GHz, this fabricated LNA has noise figure (NF) of 3.54 dB, with input return loss of -15.29 dB, output return loss of -18.1 dB, and voltage gain of 11.78 dB. The simulated and measured results are approximate.