Design techniques for low-voltage micropower CMOS switched-capacitor delta-sigma modulator

The design of a low-voltage micropower switched-capacitor delta-sigma modulator that consumes only 90/spl mu/W at 1.5 V supply is described. The modulator is designed employing bootstrapped switches in order to facilitate low voltage operation. Low power dissipation is obtained through the use of biasing some transistors in weak inversion. The delta-sigma modulator achieves an 88dB dynamic range and a peak signal to noise plus total harmonic distortion ratio of 67.1 dB with a sampling rate of 1MHz and an oversampling ratio of 128.