VLSI-implementable classically conditioned neural elements

Hardware implementation of the phenomena of classical conditioning is discussed. The circuits are built around a programmable floating gate synapse studied in earlier works and thought to be a part of an impulse neural network. Simulation results related to phenomena such as acquisition and its extinction, blocking and second order conditioning are presented. The methodology followed is that of using specialized cells. This method further allows the realization of phenomena currently under investigation such as facilitation, sensitization and habituation. Current research involves the use of pulse coded Hebbian laws in search of economical circuitry for VLSI implementation.<
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