Substrate design optimization for high performance small form factor flip chip ball grid array (FCBGA) packages

This work summarizes the multiple design and development activities within Intel to optimize the real estate for FCBGA packaging technology. The advantages made are part of the cost saving solutions to enable high performance small form factor flip chip ball grid array (FCBGA) substrate. Key focus areas include challenges in enabling ultra mini 0402/0201 die side capacitor (DSC), optimizing transfer media or material handling system, optimizing assembly and test tooling design for smaller and cheaper substrate design.