Impact of high-k plug on self-heating effects of SOI MOSFETs

A novel SOI device structure that suppresses self-heating effects is proposed. Since it provides effective thermal paths from source to substrate and from drain to substrate, it successfully suppresses the lattice temperature rise throughout the whole device. Since the buried insulator is SiO/sub 2/, it is almost free from the fabrication issues and performance issues in use of high-k material such as high internal charge density, high interface trap density, and drain-induced barrier lowering; the proposed device structure will be easy to fabricate using current trench isolation techniques.