Evidence for a composite interface State generation mode in the CHE-stressed deep-submicrometer n-MOSFET

Results from channel hot-electron stressing of 0.18-/spl mu/m n-MOSFETs indicate that, for typical drain stress voltages ranging from 2-3 V, a significant fraction of the Si-SiO/sub 2/ interface states is in fact generated by the majority of the less energetic (/spl les/qV/sub d/<3 eV) electrons in the channel, as opposed to the usual perception that injection of the more energetic (>3 eV) high-energy tail (HET) electrons plays a dominant role. The role of the minority HET electrons, however, becomes increasingly dominant as the drain voltage is reduced. On the basis that the HET electrons gain excess energy through secondary means, this composite interface state generation mode may have a significant impact on the accuracy of hot-carrier reliability projection.