A programmable cellular neural network circuit

In this paper, we propose and develop a fully programmable CNN circuit. The CNN coefficients are digitally programmable using a digital to analog converter (DAC), resulting in added flexibility. CNNs with 4/spl times/4 and 16/spl times/16 cells are designed and tested, exhibiting good accuracy when compared with Matlab and Java applications for computing CNNs. All circuits are designed and implemented with a 0.35 /spl mu/m CMOS technology. The layout of a full 4/spl times/4 CNN was designed using cadence design framework II. The circuits are simulated with Pspice/Spectre.