Adaptive DMA-based I/O interfaces for data stream handling in multi-grained reconfigurable hardware architectures

Modern application scenarios out of multimedia and mobile communication domains demand more and more performant data processing architectures, which cannot be achieved by using current DSP or microprocessor approaches. This contribution describes a new architecture approach out of the reconfigurable array field which offers a set of new features to increase the flexibility and usability of reconfigurable array architectures by increasing the performance benefit concurrently and decreasing the communication overhead caused by the system controller by managing the architecture. The main focus of this publication is I/O interface where the authors can discuss the concepts in detail.