Interaction between magnetoresistor and magnetotransistor in the longitudinal and folded vertical Hall devices

This study investigates the one-dimensional longitudinal and folded vertical Hall devices, fabricated in a standard 0.35-/spl mu/m CMOS process. The smallest nonlinearity error 0.18%, the minimum offset 0.29 mV, and the maximum supply-current-related sensitivity S/sub RI/=3.837 V/A/spl middot/T, are obtained with a 10-mA bias current excited by the supply voltage of 0.6 V. The main magnetic mechanism is that the filament current of the vertical magnetoresistor is directly injected into the base region of the bulk magnetotransistor (BMT) to increase the density of minority carriers and then enhance the magnetosensitivity. Furthermore, the induced Hall voltage of the longitudinal vertical Hall device is proportional to the bias current, but the folded vertical Hall device is inversely impacted. This advantage makes it possible to get a low-power folded vertical Hall device. The folded style not only reduces the nonlinearity error but also minimizes the offset. Unfortunately, the tradeoff is a fall in sensitivity. The BMT is applied to increase magnetic sensitivity and to compensate for this negative impact.