Reduction of FFT circuit area for OFDM demodulator based on skipping-point representation

In order to reduce FFT circuit area in OFDM demodulator for terrestrial digital broadcasting system in Japan, we propose an approach to reduce bit width for operations without performance degradation of the demodulator. The most important point is employing 11-bit skipping-point representation for internal operation in FFT instead of 14-bit fixed-point representation. The assignment of bit-fields that minimizes BER (Bit Error Rate) has been chosen for the 11-bit skipping-point representation: 10 bit for significand, and 1 bit for radix-16 exponent. By reducing the bit width for internal operation from 14 to 11, we can reduce the circuit area by 17.6 % with the complex multipliers, and by 21.4 % with the RAMs used in FFT. In total, the area of the whole FFT circuit has been reduced by 18 %. This result shows the effectiveness of the proposed method.