A high speed centroid computation circuit in analog VLSI

We present a new centroid computation circuit with very low dc offset and high bandwidth. A novel test setup is also shown to test adaptive optic integrated circuits. Static and dynamic simulation and test results of the centroid computation circuit are shown. Compared to the work of Deweerth we report a 4.3 times increase in the bandwidth in both simulation and test results. The centroid circuit is fabricated in the AMI 0.5 /spl mu/m CMOS process. A 1D centroid circuit with 7 photodiodes has dimensions equal to 765 /spl mu/m/spl times/90 /spl mu/m.