A 5-GHz delta-sigma PLL frequency synthesizer for WLAN applications

A frequency synthesizer is designed in a 0.25 /spl mu/m CMOS process for 5-GHz WLAN applications. In consideration of low power consumption, the synthesizer integrates a low power and high efficient voltage-controlled oscillator (VCO) and an injection-locked frequency divider as the first stage prescaler. A digital delta-sigma modulator is used for frequency switching control where the pipelining technique is adopted to enhance the modulator performance. The synthesizer has a bandwidth of 300 KHz for a 35 MHz reference and can achieve a close-in phase noise of about -80 dBc/Hz while the total power consumption is 33 mW from a single 2.5 V supply.