Elimination of chuck-related parasitics in MOSFET gate capacitance measurements

We report the observation of frequency dispersion in the measured gate capacitance of nMOS transistors with a 2.2-nm SiO/sub 2/ gate dielectric, and a practical arrangement for eliminating this dispersion from the measurement. The anomalous dispersion is due to a parasitic reactive path to ground through the wafer chuck of the measurement apparatus. A circuit model for the device and apparatus results in an adequate description of the dispersion. Consistent with this model, we demonstrate the elimination of the dispersion by removing the parasitic path to ground through making appropriate connections from the capacitance meter to the chuck. The improved measurement arrangement results in less than 0.1% dispersion in the measured accumulation capacitance from 10 kHz to 1 MHz.