High frequency test structures definition for the study of flip-chip process effects on inductor coupling in a BiCMOS process

Study of flip-chip process effects on coupling between two inductors or an inductor and a ground plane has been achieved to define design rules for device relative placement on silicon and on glass face to face. In this paper, high frequency test structures are described and results from S parameter measurements are presented. HFSS complementary simulations have been achieved to complete the coupling abacus and therefore define design rules.