A pipelining approach to operating modular software defined radio

Interworking between different radio technologies emerges as a potential solution to offering flexible services to mobile users. Modular software defined radio (Mod-SDR) devices are key to achieving short time-to-market under these conditions. Hence, guidelines for designing and operating such systems gain in importance. In this paper we continue to study the partitioning and scheduling of software modules on system-on-chip hardware for Mod-SDR. In particular, we focus on an efficient pipelining method, which we have named graph duplication pipelining (GDP). We discuss the GDP approach in the context of Mod-SDR, taking a UTRA FDD 64 kbps uplink transmitter as an example. We compare GDP to both nonpipelined and extremely pipelined signal processing, while observing realistic operating conditions. We show how close these approaches come to the theoretical upper bound on two-processor speedup. Furthermore, we examine the resulting depth of the radio frame pipeline which is important for delay-sensitive applications, where we discuss both circuit-switched and packet-switched services. Based on computer simulations we conclude on guidelines for operating modular software defined radio.