BiCMOS Futurebus transceiver

An advanced BiCMOS technology is used to build transceivers that provide incident edge switching on a Futurebus backplane with max prop delay time of 3 ns, and standby Icc of less than 4 mA. A Schottky diode between the driving transistor and the pad is reverse-biased so that pin capacitance is kept below 5 pf to minimize backplane loading. Open collector outputs drive 100 mA and allow wire-OR signals. Output voltage swings are between 1 and 2 V, and receiver thresholds are 1.55 V+or-0.07 V. Edge rates of 2 ns per volt, controlled ground bounce, and rounded curves where the driver begins and ends a voltage-swing help to control ringing on the stub, improve noise immunity, and suppress high-frequency signal components. Delay skew of less than 0.5 ns from pin to pin, and edge to edge, even during simultaneous switching, allows for high-speed, reliable data transfers. Transistor level circuits used to achieve these characteristics are shown, with resulting waveforms.<>