Implementation of a pixel-level snake algorithm on a CNNUM-based chip set architecture

In this paper, an on-chip implementation of the active contour technique called pixel-level snakes is proposed. This is based on an optimized cellular neural network (CNN) algorithm with capabilities to support changes in the contour topology. The entire algorithm has been implemented on a 64/spl times/64 CNN universal machine chip-set architecture for which the results of the time performance measurements are given. To illustrate the validity and capabilities of the proposed implementation some on-chip experiments are also included.