Optimization of RF linearity in DG-MOSFETs

RF linearity of double-gate (DG) MOSFETs is investigated using accurate two-dimensional simulations. It is shown that the asymmetric DG-MOSFET is more linear than the symmetric counterpart and that DG-MOSFET linearity can be improved by a careful optimization of channel thickness, nonuniform doping profile and gate work function. For optimum linearity, a nonuniform doping profile and a thick (/spl sim/20 nm) silicon-on-insulator (SOI) layer is required. An intuitive description of this optimization is presented.