Bunch-by-bunch digital dampers for the Fermilab main injector and recycler

A digital transverse and longitudinal bunch-by-bunch damper has been prototyped and tested. The damper is based on immediate 14-bit digitization at 212 MHz (4x the 53 MHz RF bunch frequency), digital pipelined processing in field-programmable gate array (FPGA) logic, and a digitally synthesized damping kick driven by a 212 MHz DAC. A single board performs all calculations for both transverse and longitudinal damping, as well as providing extensive diagnostic read out, and automatically switching between the variety of beam types present. Initial prototyping was carried out by customizing firmware on a commercial board, and has successfully demonstrated bunch-by-bunch transverse damping, antidamping, and pinging. Longitudinal damping uses identical firmware with different FIR coefficients, and will be beam tested when cavities and power amplifiers are installed in the Main Injector summer 2003. A second generation board, in which damping calculations for all 3 coordinates are performed in a single large FPGA is in fabrication. Several other applications are being considered for this board, including implementation of an entire Low-Level RF system on a single board.