Vibration fatigue test and analysis for flip chip solder joints

Vibration fatigue tests and analysis for flip chip solder joint reliability assessments were investigated. Dynamic characterizations of flip chip on board (FCOB) assemblies were evaluated using accelerometer and high speed camera measurements during vibration tests. A vibration fatigue test and analysis methodology for flip chip solder joint fatigue life prediction have been developed. Out-of-plane vibration fatigue tests were investigated for constant G-level tests at 3 G, 5 G and 10 G respectively. A sinusoidal sweep test within a narrow band near the fundamental resonant frequency was used. Solder joint failure detection was made by daisy chained resistance monitoring during the test. A plot of G-level versus mean time to failure (MTTF) was developed. A varying G-level vibration test with 3 G, 5 G and 10 G blocks arranged in ascending sequence was conducted for cumulative fatigue damage assessment study. The linear cumulative damage analysis method (Miner's rule) predicted non-conservative results for vibration fatigue failures in the flip chip solder joints. Finite element analysis (FEA) using a global-local beam modeling method was used to compute the fundamental natural frequency result compared to experimental data. A quasi-static analysis method was developed to model the effect of flip chip location on solder joint fatigue life.