A programmable HIPPI interface for a graphics supercomputer

As networks approach gigabit performance, supercomputer host interfaces are becoming the communication bottleneck. The Network Interface Unit (NIU) is a high-performance host interface for Pixel Planes 5, a custom graphics supercomputer. The design offers both performance and programmability through a balance of data-marshaling hardware and an embedded processor. The authors describe the NIU hardware and firmware architecture. They present some preliminary performance measurements and assess the applicability of this design for the targeted environment. They also comment on its suitability for other environments and outline plans for the future work.