1.5V rail-to-rail programmable-gain CMOS amplifier

A 1.5V programmable-gain differential amplifier is implemented using a novel design technique for operating closed-loop amplifier circuits at very low supply voltages. It is based on the use of quasi-floating gate transistors, avoiding issues encountered in true floating-gate structures such as the initial floating-gate charge, offset drift with temperature, and gain-bandwidth product degradation. A prototype fabricated in a 0.5-/spl mu/m CMOS technology shows a 0.6% THD for almost rail-to-rail outputs and a 4 MHz unity-gain bandwidth.