Verification of a complex SoC; the PRO/sup 3/ case-study

In this paper we present the experience gained from the design and verification of a complex network processor The PRO/sup 3/ processor can operate in either ATM or IP based multiprotocol networking environments, supporting link rates up to 2.4 Gbps. We describe the methodology followed during the verification process, from specifications to silicon prototype test and highlight the problems encountered during the post-layout procedure. To accommodate the application verification a proprietary debug tool is integrated in the system. The paper emphasizes the importance of the verification, addressing it as a parallel process to system design, and highlights the need for easy to verify designs.