Low-cost CMOS algorithmic digital-analogue convertor for high-frequency applications

A novel, low-cost digital-analog convertor (DAC) circuit suitable for high-frequency applications has been designed and integrated using a 2.5- mu m CMOS technology. The convertor uses a purely passive parasitic-compensated switched-capacitor circuit to implement a conversion algorithm consisting of a mere charge division between equal-valued capacitors. The output voltage signal directly related to the equivalent charge of the converted digital word is produced by means of a charge-to-voltage conversion circuit which is designed to become insensitive to both the offset and finite DC gain of the amplifier. The analog active area of the integrated DAC is 0.25 mm/sup 2/.<
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