Implementation of an Alpha microprocessor in SOI

Conversion of a 150 million transistor microprocessor from a 0.18 /spl mu/m bulk process to a 0.13 /spl mu/m SOI process is described. Shorter channels and SOI characteristics cause leakage that must be managed. System requirements drive duplication of signal characteristics and integrity for all I/O. Adaptation of the Si to a 200 /spl mu/m bump structure that is 50 /spl mu/m smaller than the previous generation is shown.