A charge correction cell for FGMOS-based circuits

This paper describes a novel cell used in circuits with floating gate MOS transistors (FGMOS) to compensate for variations in the device effective threshold voltage caused by the trapped charge at the floating gate. The performance of the circuit is illustrated with experimental results showing a residual error below 1%. This coarse compensation makes it possible to reduce charge effects to the same order of magnitude as the conventional mismatching in normal MOS transistors.