Micropower, low-noise, SOI CMOS preamplifiers for deep space missions

In this paper, we present two micropower, low-noise 0.35-/spl mu/m partially depleted (PD) silicon-on-insulator (SOI) CMOS preamplifiers designed for the extreme temperature and radiation environment of deep space. PMOS input devices are used for low flicker noise, and these are operated in moderate inversion to achieve high transconductance efficiency and minimum input-referred gate white-noise voltage at low power consumption. Resistive source degeneration, using MOS devices in the deep ohmic region, reduces the effective transconductance of non-input NMOS devices and their normally high flicker noise contributions. The measured input-referred noise for a differential input preamplifier is 275 nV//spl radic/Hz at 1 Hz with a 15-Hz flicker noise corner frequency and white noise floor of 70 nV//spl radic/Hz. The measured input-referred noise for a transimpedance preamplifier is 200 nV//spl radic/Hz at 1 Hz with a 30-Hz flicker noise corner frequency and white noise floor of 35 nV//spl radic/Hz. Each preamplifier operates at a core power dissipation of 6.6 /spl mu/W at a supply voltage of 3.3 V.