A unified hot carrier degradation model for integrated lateral and vertical nDMOS transistors

In this paper, the hot carrier degradation behavior of integrated lateral and vertical DMOS transistors is analyzed. It will be shown that a unified degradation model is applicable to both devices. In the LDMOS, two degradation mechanisms occur: the electron mobility decreases due to increased carrier scattering upon D/sub it/ formation; and hot-hole injection and trapping occurs in the drift region. It will be shown that the second mechanism is absent in the VDMOS. TCAD simulations are used to support the experimental findings.