A systematic approach to interconnect modeling and process monitoring

This paper describes a systematic approach to the use of electrical measurements for interconnect modeling and process monitoring. A fast and area efficient technique to measure interconnect capacitance in a scribe line is discussed. The benefits of this technique in monitoring interconnect process, and in fanning out technology to multiple fabs, in monitoring wafer-to-wafer/lot-to-lot variations and in accurate modeling of capacitance are illustrated using the results from 130 nm copper technology.