System on a chip with 4 Mb built-in flash ROM for CD-RW drives capable of 52/spl times/ CD-R and 32/spl times/ CD-RW write speed

We proposed a system on a chip (SOC) for CD-RW (ReWritable) drives. This SOC consists of 32 bit RISC CPU, 4 Mb flash ROM, C1/C2 ENDEC, data recovery, digital servo, C3 ENDEC, ATAPI and write strategy blocks. It supports up to 52X CD-R and 32X CD-RW recording speed. Most of the servo functions except the loop filter are implemented in software with embedded CPU. the servo loop filter is implemented in a hardwire 32 bit adder and a 16/spl times/16 multiplier. We designed a new data slicing circuit to improve readability. Also, we introduced a new linking method to link data seamlessly even in the occurrence of buffer under-run. This chip was fabricated in 0.18 /spl mu/m, 1-poly 5-metal CMOS process and occupies an active area of 5.2 mm /spl times/ 5.6 mm.