Optimization of a foundry compatible 0.18 /spl mu/m CMOS RF and mixed single process

Demand for mixed signal and RF devices on 0.18 /spl mu/m CMOS silicon is driving the Foundry industry to rapidly incorporate these additional modules. This paper reports on the electrical characteristics and optimization of four mixed signal devices. Using a modular approach, Deep N-well isolated RF transistors, Native transistors, Inductors, and MIM capacitors were successfully integrated into our major Foundry Compatible 0.18 /spl mu/m CMOS Logic process, without adversely affecting the digital devices. Twenty-nine different inductor structures were built and evaluated. The presence of Deep N-well implant under the inductors greatly reduced Qpeak. Self Resonance Frequency was dominated by factors controlling capacitive coupling to the substrate (line width, number of coil turns).