A 110 MHz 84 dB CMOS programmable gain amplifier with RSSI

This paper describes a CMOS programmable gain amplifier that maintains a 3 dB bandwidth greater than 110 MHz and can provide 84 dB gain control range in 1 dB steps. The PGA can also be operated in a low power mode with 3 dB bandwidth greater than 71 MHz. Integrated with this PGA is a CMOS successive logarithmic detecting amplifier with a /spl plusmn/0.7 dB logarithmic accuracy over 80 dB dynamic range. It achieves a sensitivity of -83 dBm. The amplifier consumes 13 mA from a single 3V supply in high power mode. The chip area including pads occupies 1.5/spl times/1.5 mm/sup 2/.