A 4.9mW 270MHz CMOS frequency synthesizer/FSK modulator

A 270 MHz frequency synthesizer/FSK modulator for low-rate WPAN is implemented. It consumes only 4.9 mW, adopting a current re-use technique, self-DC biasing scheme, and appropriate divider architecture. The 3/sup rd/-order feedback type DSM and the high performance charge pump are designed for wide loop bandwidth, which enables the design of a low power and low noise frequency synthesizer. The implemented prototype offers 500 kHz-loop bandwidth and -104dBc/Hz in-band noise. It also plays a role as an FSK modulator which shows only 1.1 dB degradation at 10/sup -3/ symbol BER compared with the ideal FSK-modulator.