Bias circuit for high yield self-bias MMIC amplifier for APAAs

In this paper, a Ka-band self-bias low-noise MMIC amplifier is presented, which is equipped with a bias circuit that compensates for the gain variation of the self-bias amplifier between chips due to process variations. The Ka-band low noise MMIC amplifier, with proposed bias circuit, was designed and manufactured. It was proved that the proposed bias circuit reduced the gain variation between chips from 0.8 dB RMS to 0.3 dB RMS. This amplifier is suitable for active phased array applications.