DRAM reliability characterization by using dynamic operation stress in wafer burn-in mode

Circuits to apply dynamic operation stress (DOS) to DRAM cells in wafer burn-in (WBI) mode are successfully implemented and contribute to wafer level reliability characterization of DRAMs. We verify that DOS during the burn-in (BI) test deteriorates data retention time microscopically, which is mainly attributed to DOS-induced hot carrier (HC) degradation of DRAM cells. In addition, the DRAM reliability characterization results in the WBI mode are in good agreement with those by dynamic operation in the package burn-in (PBI) mode.