Thermoelectric microdevice fabrication process and evaluation at the Jet Propulsion Laboratory (JPL)

In the Materials and Device Technology Group at JPL, we have developed a unique fabrication method for a thermoelectric microdevice that utilizes standard integrated circuit techniques in combination with electrochemical deposition of compound semiconductors (Bi/sub 2/Te/sub 3//Bi/sub 2-x/Sb/sub x/Te/sub 3/). Our fabrication process is innovative in the sense that we are able to electrochemically micro mold different thermoelectric elements, with the flexibility of adjusting geometry, materials composition or batch scalability. Successive layers of photoresist were patterned and electrochemically filled with compound semiconductor materials or metal interconnects (Au or Ni). A thermoelectric microdevice was built on either glass or an oxidized silicon substrate containing 63 couples (63 n-legs/63 p-legs) at approximately 20 microns in structure height and with a device area close to 1700 /spl mu/m x 1700 /spl mu/m. In cooling mode, we evaluated device performance using an IR camera and differential thermal imaging software.