Register estimation for digital system design: an approach based on timed Petri nets

This work presents a method based on Petri nets for estimating the number of registers needed for hardware implementation of behavioral descriptions. The proposed method considers the data-dependency graph represented by a Petri net model. Such a model along with the control flow, also represented by a Petri net model, describes behavioral specifications. This work is inserted in the context of hardware/software codesign systems.