CMOS technology directions

Unlike NMOS technology, which has been relatively standardized by the industry, CMOS technology is currently much more varied in its methods of production. Presently, the following alternatives (and related issues) exist: bulk CMOS versus CMOS-SOS (cost, yield, performance), P-well versus N-well architecture (performance, latch-up, immunity, alpha immunity), epitaxial versus non-epitaxial substrates (latch-up, alphas, cost, yield) and single versus double poly processing (density, cost, performance). In the future, decisions regarding new isolation techniques (e.g., slot), new interconnect layers (e.g., silicides), and methods for soft-error immunity (e.g., buried layers), may cause a further fragmentation of the CMOS technology.