Chip Alignment Templates for Multichip Module Assembly

Future high-performance large-scale digital systems will increasingly require high-density multichip hybrid packaging techniques. Chip attachment by flip-chip mounting, as in the well-established eontrolled-collapse solder-bump contact approach, has several fundamental advantages over the more familiar wire-bonded hybrid assembly approach. However, testing of flip-chip mounted assemblies and replacement of defective parts, along with the alignment of chip bonding pads to substrate pads, involves substantial practical difficulties. A chip alignment template, aligned to and permanently mounted on the hybrid substrate, is proposed. Anisotropic etching of silicon wafers provides a high-precision technique compatible with batch fabrication of the templates. Fabrication of such templates and factors influencing chip alignment accuracy are discussed.