Area-Efficient/Low-Power MRAM-PIM based on Crossbar Array utilizing Ternary Output

In this paper, we propose an MRAM-based analog process-in-memory (MPIM) architecture with ternary output. The proposed architecture can 1) increase array efficiency by binarizing the input to 0 or 1 instead of –1 or 1, 2) avoid accuracy degradation by using current compensation circuit, and 3) reduce energy overhead via 3-bit downscaling. Simulation results using a two-layer perceptron demonstrate that the proposed MPIM achieves 90.3% inference accuracy on the MNIST dataset and a peak energy efficiency of 819.8 TOPS/W at 200 MHz.