Performance Analysis of Double-Gate TFETs with High-Density Pocket for Suppressed Ambipolar Conduction

This work aims to find ways to reduce ambipolar current in double-gate tunneling field-effect transistors (DGTFETs) to make them more suitable for power-conscious designs. Two key approaches are explored, implementing dopant distribution with gradual variation in the drain region (Graded Drain) and incorporating a heavily doped n-type pocket layer (High Density Layer, HDL) at the tunneling junction. These techniques aim to suppress unwanted band-to-band tunneling at the drainchannel junction, particularly under reverse bias conditions, where ambipolar conduction is most prominent. To ensure that tunneling predominantly happens at the junction between the source and channel regions under forward bias (positive gate voltage), maintaining well controlled doping gradients across the source, channel and drain is vital. Specifically, a sharp band bending is required at the source-channel junction to augment tunneling capability, while a smoother potential gradient along the channel-drain boundary helps to inhibit reverse tunneling. These suggested modifications highlight a promising pathway toward enhancing the performance of DG-TFETs by effectively minimizing ambipolar leakage.