A RISC-V SoC With Reconfigurable Custom Instructions on a Synthesized eFPGA Fabric in 22nm FinFET

This paper presents a flexible and energy-efficient RISC-V System-on-Chip (SoC) in 22nm FinFET technology, achieving state-of-the-art performance by tightly integrating the CPU with a synthesized embedded FPGA (eFPGA), enabling the implementation of reconfigurable custom instructions. The tight integration of the eFPGA with SoC scratchpad memory facilitates parallel high-bandwidth (16 GB/s) access to scratchpad SRAMs and enables rapid eFPGA reconfiguration ( 2 μs) to switch between custom instruction sets. The eFPGA fabric itself is optimized for compute-intensive tasks, featuring fused logic tiles that amortize routing overheads to achieve a compute density of 22.3 GOPS/mm2. The measurement results from the fabricated chip demonstrate a peak energy efficiency of 748 GOPS/W (INT8) while improving throughput and energy by 1-2 orders of magnitude compared to the CPU for accelerated applications.