On-Chip Photonic Convolution Framework Enabled by Fine-Grained Diffractive Slabs With Reduced Error and Wavelength Insensitivity

Silicon nitride photonic integrated platforms, characterized by ultra-low propagation loss, broad transparency window, high power-handling capacity, and full CMOS compatibility, present a highly promising solution for high-performance optical computing networks. In this study, an on-chip silicon nitride photonic convolution framework is proposed based on fine-grained diffractive slabs with reduced error and wavelength insensitivity. The diffractive slab employs Fresnel approximation to map conventional optical lenses onto a two-dimensional plane. Through meticulous optimization of the structural parameters and application of wavelength-division multiplexing techniques, the slab effectively mitigates the scaling limitations associated with the number of diffractive ports. Compared with previous diffractive-based convolution accelerators, the proposed network demonstrates superior computational error, achieving a root- mean-square error of 0.021 for Fourier-based convolution operations. Notably, small error is achieved using only half the number of modulators and drivers, offering significant potential for accelerating complex processing tasks and high-performance computing applications.