Device-To-Package Level Thermal Risk Analysis of the Back-Side Power Delivery Network

In this study, we present a novel approach to enhance the coverage and accuracy of 3D-FEM thermal simulations across the entire range from device-level to package-level by implementing an appropriate boundary modeling technique. The method was validated through the comparison of simulation results with a device under test element group measurements, which demonstrated a high level of consistency. We found that the back-side power delivery network has a significant impact on heat dissipation, with a 30.1% contribution to the thermal flow from the device through the back-side to the front-side back end of line. In a real product scenario, where multiple hotspots and package thermal resistance are considered, the lateral heat spreading is suppressed, leading to an increased contribution of the bonding layer and the sustain wafer from 16.0% to 93.3%.