HPM-Induced Logic Hold in CMOS Circuits Featuring Industry-Standard ESD Clamping Diodes

Complementary Metal-Oxide-Semiconductor (CMOS) circuits are a cornerstone of modern electronic devices, but are innately vulnerable to high-energy transients. To mitigate such risks, it is industry-standard to equip CMOS logic systems with input/output periphery featuring Electrostatic Discharge (ESD) protection diodes. However, under High Power Microwave (HPM) exposure, these ESD diodes become the catalyst for a disruptive HPM-induced vulnerability: The ESD diodes rectify HPM stimuli, creating a dc offset capable of reaching the CMOS logic switching threshold. This effect, which we term ‘Logic Hold’, compromises CMOS circuits by forcing the input logic high during HPM exposure, thus preventing proper downstream logic functionality. In this paper, for the first time, we make a real-time observation of the HPM-induced Logic Hold effect disrupting the operation of a commercial-grade CMOS microchip processing a digital input.