AICL Co-Pilot: An Interactive Analog Integrated Circuit Layout Generator

This paper serves as an introduction to the Analog Integrated Circuit Layout (AICL) Co-pilot framework, which is used for developing parametrized analog circuit generators from schematics (netlists) and synthesizing their corresponding layout for a target process technology. The purpose of this tool is to bridge the gap between the manual and time-intensive process of constructing analog circuit layouts that is typical in the traditional design flow and the fully automatic analog circuit layout generation with no man-in-the-loop that seems ever so elusive. To justify our approach, this paper notes the short-comings of other similar open-source frameworks and offers some insight as to why these have not proven as effective. In contrast, we also demonstrate with practical examples how this tool overcomes those short-comings and pushes the envelope in truly achieving fully automatic analog layout generation.