Design and Performance Analysis of a Novel 8-Bit Reversible ALU Using 16nm CMOS Technology

Reversible logic has emerged as a key component of contemporary circuit design due to the increasing demand for ultra-low-power and high-performance digital systems in nanoscale technologies. This study worked on reversible gatebased Arithmetic Logic Units (ALUs) and conventional ALUs. Reversible base ALU works on different types of reversible gates, such as Feynman, URG, Fredkin, and Peres. This paper proposed that a novel 8-bit reversible ALU performed with a 21.29 % delay, 69.38 % power, and 66.38 % energy improvement noticed when compared with conventional reversible ALU. Additionally, the novel 8-bit reversible ALU improves delay, power, and energy by 26.69%, 69.74%, and 67.87 %, respectively, compared to the existing CMOS ALU. All performances are analyzed using 16 nm Complementary Metal Oxide Semiconductor (CMOS) technology, and the design is synthesized. This assessment employed Cadence Virtuoso software for simulations and meticulous data analysis.